spin_delay.hpp

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// -----------------------------------------------------------------------------------------------------
// Copyright (c) 2006-2022, Knut Reinert & Freie Universität Berlin
// Copyright (c) 2016-2022, Knut Reinert & MPI für molekulare Genetik
// This file may be used, modified and/or redistributed under the terms of the 3-clause BSD-License
// shipped with this file and also available at: https://github.com/seqan/seqan3/blob/master/LICENSE.md
// -----------------------------------------------------------------------------------------------------
 
#pragma once
 
#include <thread>
 
#ifndef SEQAN3_HAS_MM_PAUSE
#    if defined(__SSE2__) && __has_include(<xmmintrin.h>)
#        include <xmmintrin.h> // _mm_pause()
#        define SEQAN3_HAS_MM_PAUSE 1
#    endif // defined(__SSE2__) && __has_include(<xmmintrin.h>)
#endif     // SEQAN3_HAS_MM_PAUSE
 
#include <seqan3/core/platform.hpp>
 
namespace seqan3::detail
{
class spin_delay
{
public:
    constexpr spin_delay() noexcept = default;                               
    constexpr spin_delay(spin_delay const &) noexcept = default;             
    constexpr spin_delay(spin_delay &&) noexcept = default;                  
    constexpr spin_delay & operator=(spin_delay const &) noexcept = default; 
    constexpr spin_delay & operator=(spin_delay &&) noexcept = default;      
    ~spin_delay() noexcept = default;                                        
 
 
    void wait()
    {
        if (current <= max_repetitions) // Start active spinning phase
        {
            for (int_fast32_t i = 0; i < current; ++i)
                pause_processor();
            current <<= 1; // double the amount of active CPU waiting cycles.
        }
        else // Start passive spinning phase
        {
            std::this_thread::yield();
        }
    }
 
private:
    void pause_processor()
    {
#if SEQAN3_HAS_MM_PAUSE // AMD and Intel
        _mm_pause();
#elif defined(__armel__)                                                                                               \
    || defined(__ARMEL__) // arm, but broken? ; repeat of default case as armel also defines __arm__
        asm volatile("nop" ::: "memory"); // default operation - does nothing => Might lead to passive spinning.
#elif defined(__arm__) || defined(__aarch64__)                     // arm big endian / arm64
        __asm__ __volatile__("yield" ::: "memory");
#elif defined(__ia64__)                                            // IA64
        __asm__ __volatile__("hint @pause");
#elif defined(__powerpc__) || defined(__ppc__) || defined(__PPC__) // PowerPC
        __asm__ __volatile__("or 27,27,27" ::: "memory");
#else                                                              // everything else.
        asm volatile("nop" ::: "memory"); // default operation - does nothing => Might lead to passive spinning.
#endif
    }
 
    static constexpr int_fast32_t max_repetitions{16};
    int_fast32_t current{1};
};
 
} // namespace seqan3::detail